.nes file format: GraphViz block diagram (.dot) source

File extension

nes

KS implementation details

License: WTFPL

This page hosts a formal specification of .nes file format using Kaitai Struct. This specification can be automatically translated into a variety of programming languages to get a parsing library.

GraphViz block diagram source

ines.dot

digraph {
	rankdir=LR;
	node [shape=plaintext];
	subgraph cluster__ines {
		label="Ines";
		graph[style=dotted];

		ines__seq [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
			<TR><TD BGCOLOR="#E0FFE0">pos</TD><TD BGCOLOR="#E0FFE0">size</TD><TD BGCOLOR="#E0FFE0">type</TD><TD BGCOLOR="#E0FFE0">id</TD></TR>
			<TR><TD PORT="header_pos">0</TD><TD PORT="header_size">16</TD><TD>Header</TD><TD PORT="header_type">header</TD></TR>
			<TR><TD PORT="trainer_pos">16</TD><TD PORT="trainer_size">512</TD><TD></TD><TD PORT="trainer_type">trainer</TD></TR>
			<TR><TD PORT="prg_rom_pos">528</TD><TD PORT="prg_rom_size">(header.len_prg_rom * 16384)</TD><TD></TD><TD PORT="prg_rom_type">prg_rom</TD></TR>
			<TR><TD PORT="chr_rom_pos">...</TD><TD PORT="chr_rom_size">(header.len_chr_rom * 8192)</TD><TD></TD><TD PORT="chr_rom_type">chr_rom</TD></TR>
			<TR><TD PORT="playchoice10_pos">...</TD><TD PORT="playchoice10_size">8224</TD><TD>Playchoice10</TD><TD PORT="playchoice10_type">playchoice10</TD></TR>
			<TR><TD PORT="title_pos">...</TD><TD PORT="title_size">⇲</TD><TD>str(ASCII)</TD><TD PORT="title_type">title</TD></TR>
		</TABLE>>];
		subgraph cluster__header {
			label="Ines::Header";
			graph[style=dotted];

			header__seq [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
				<TR><TD BGCOLOR="#E0FFE0">pos</TD><TD BGCOLOR="#E0FFE0">size</TD><TD BGCOLOR="#E0FFE0">type</TD><TD BGCOLOR="#E0FFE0">id</TD></TR>
				<TR><TD PORT="magic_pos">0</TD><TD PORT="magic_size">4</TD><TD>4E 45 53 1A</TD><TD PORT="magic_type">magic</TD></TR>
				<TR><TD PORT="len_prg_rom_pos">4</TD><TD PORT="len_prg_rom_size">1</TD><TD>u1</TD><TD PORT="len_prg_rom_type">len_prg_rom</TD></TR>
				<TR><TD PORT="len_chr_rom_pos">5</TD><TD PORT="len_chr_rom_size">1</TD><TD>u1</TD><TD PORT="len_chr_rom_type">len_chr_rom</TD></TR>
				<TR><TD PORT="f6_pos">6</TD><TD PORT="f6_size">1</TD><TD>F6</TD><TD PORT="f6_type">f6</TD></TR>
				<TR><TD PORT="f7_pos">7</TD><TD PORT="f7_size">1</TD><TD>F7</TD><TD PORT="f7_type">f7</TD></TR>
				<TR><TD PORT="len_prg_ram_pos">8</TD><TD PORT="len_prg_ram_size">1</TD><TD>u1</TD><TD PORT="len_prg_ram_type">len_prg_ram</TD></TR>
				<TR><TD PORT="f9_pos">9</TD><TD PORT="f9_size">1</TD><TD>F9</TD><TD PORT="f9_type">f9</TD></TR>
				<TR><TD PORT="f10_pos">10</TD><TD PORT="f10_size">1</TD><TD>F10</TD><TD PORT="f10_type">f10</TD></TR>
				<TR><TD PORT="reserved_pos">11</TD><TD PORT="reserved_size">5</TD><TD>00 00 00 00 00</TD><TD PORT="reserved_type">reserved</TD></TR>
			</TABLE>>];
			header__inst__mapper [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
				<TR><TD BGCOLOR="#E0FFE0">id</TD><TD BGCOLOR="#E0FFE0">value</TD></TR>
				<TR><TD>mapper</TD><TD>(f6.lower_mapper | (f7.upper_mapper &lt;&lt; 4))</TD></TR>
			</TABLE>>];
			subgraph cluster__f6 {
				label="Ines::Header::F6";
				graph[style=dotted];

				f6__seq [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
					<TR><TD BGCOLOR="#E0FFE0">pos</TD><TD BGCOLOR="#E0FFE0">size</TD><TD BGCOLOR="#E0FFE0">type</TD><TD BGCOLOR="#E0FFE0">id</TD></TR>
					<TR><TD PORT="lower_mapper_pos">0</TD><TD PORT="lower_mapper_size">4b</TD><TD>b4</TD><TD PORT="lower_mapper_type">lower_mapper</TD></TR>
					<TR><TD PORT="four_screen_pos">0:4</TD><TD PORT="four_screen_size">1b</TD><TD>BitsType1</TD><TD PORT="four_screen_type">four_screen</TD></TR>
					<TR><TD PORT="trainer_pos">0:5</TD><TD PORT="trainer_size">1b</TD><TD>BitsType1</TD><TD PORT="trainer_type">trainer</TD></TR>
					<TR><TD PORT="has_battery_ram_pos">0:6</TD><TD PORT="has_battery_ram_size">1b</TD><TD>BitsType1</TD><TD PORT="has_battery_ram_type">has_battery_ram</TD></TR>
					<TR><TD PORT="mirroring_pos">0:7</TD><TD PORT="mirroring_size">1b</TD><TD>b1→Mirroring</TD><TD PORT="mirroring_type">mirroring</TD></TR>
				</TABLE>>];
			}
			subgraph cluster__f7 {
				label="Ines::Header::F7";
				graph[style=dotted];

				f7__seq [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
					<TR><TD BGCOLOR="#E0FFE0">pos</TD><TD BGCOLOR="#E0FFE0">size</TD><TD BGCOLOR="#E0FFE0">type</TD><TD BGCOLOR="#E0FFE0">id</TD></TR>
					<TR><TD PORT="upper_mapper_pos">0</TD><TD PORT="upper_mapper_size">4b</TD><TD>b4</TD><TD PORT="upper_mapper_type">upper_mapper</TD></TR>
					<TR><TD PORT="format_pos">0:4</TD><TD PORT="format_size">2b</TD><TD>b2</TD><TD PORT="format_type">format</TD></TR>
					<TR><TD PORT="playchoice10_pos">0:6</TD><TD PORT="playchoice10_size">1b</TD><TD>BitsType1</TD><TD PORT="playchoice10_type">playchoice10</TD></TR>
					<TR><TD PORT="vs_unisystem_pos">0:7</TD><TD PORT="vs_unisystem_size">1b</TD><TD>BitsType1</TD><TD PORT="vs_unisystem_type">vs_unisystem</TD></TR>
				</TABLE>>];
			}
			subgraph cluster__f9 {
				label="Ines::Header::F9";
				graph[style=dotted];

				f9__seq [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
					<TR><TD BGCOLOR="#E0FFE0">pos</TD><TD BGCOLOR="#E0FFE0">size</TD><TD BGCOLOR="#E0FFE0">type</TD><TD BGCOLOR="#E0FFE0">id</TD></TR>
					<TR><TD PORT="reserved_pos">0</TD><TD PORT="reserved_size">7b</TD><TD>b7</TD><TD PORT="reserved_type">reserved</TD></TR>
					<TR><TD PORT="tv_system_pos">0:7</TD><TD PORT="tv_system_size">1b</TD><TD>b1→TvSystem</TD><TD PORT="tv_system_type">tv_system</TD></TR>
				</TABLE>>];
			}
			subgraph cluster__f10 {
				label="Ines::Header::F10";
				graph[style=dotted];

				f10__seq [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
					<TR><TD BGCOLOR="#E0FFE0">pos</TD><TD BGCOLOR="#E0FFE0">size</TD><TD BGCOLOR="#E0FFE0">type</TD><TD BGCOLOR="#E0FFE0">id</TD></TR>
					<TR><TD PORT="reserved1_pos">0</TD><TD PORT="reserved1_size">2b</TD><TD>b2</TD><TD PORT="reserved1_type">reserved1</TD></TR>
					<TR><TD PORT="bus_conflict_pos">0:2</TD><TD PORT="bus_conflict_size">1b</TD><TD>BitsType1</TD><TD PORT="bus_conflict_type">bus_conflict</TD></TR>
					<TR><TD PORT="prg_ram_pos">0:3</TD><TD PORT="prg_ram_size">1b</TD><TD>BitsType1</TD><TD PORT="prg_ram_type">prg_ram</TD></TR>
					<TR><TD PORT="reserved2_pos">0:4</TD><TD PORT="reserved2_size">2b</TD><TD>b2</TD><TD PORT="reserved2_type">reserved2</TD></TR>
					<TR><TD PORT="tv_system_pos">0:6</TD><TD PORT="tv_system_size">2b</TD><TD>b2→TvSystem</TD><TD PORT="tv_system_type">tv_system</TD></TR>
				</TABLE>>];
			}
		}
		subgraph cluster__playchoice10 {
			label="Ines::Playchoice10";
			graph[style=dotted];

			playchoice10__seq [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
				<TR><TD BGCOLOR="#E0FFE0">pos</TD><TD BGCOLOR="#E0FFE0">size</TD><TD BGCOLOR="#E0FFE0">type</TD><TD BGCOLOR="#E0FFE0">id</TD></TR>
				<TR><TD PORT="inst_rom_pos">0</TD><TD PORT="inst_rom_size">8192</TD><TD></TD><TD PORT="inst_rom_type">inst_rom</TD></TR>
				<TR><TD PORT="prom_pos">8192</TD><TD PORT="prom_size">32</TD><TD>Prom</TD><TD PORT="prom_type">prom</TD></TR>
			</TABLE>>];
			subgraph cluster__prom {
				label="Ines::Playchoice10::Prom";
				graph[style=dotted];

				prom__seq [label=<<TABLE BORDER="0" CELLBORDER="1" CELLSPACING="0">
					<TR><TD BGCOLOR="#E0FFE0">pos</TD><TD BGCOLOR="#E0FFE0">size</TD><TD BGCOLOR="#E0FFE0">type</TD><TD BGCOLOR="#E0FFE0">id</TD></TR>
					<TR><TD PORT="data_pos">0</TD><TD PORT="data_size">16</TD><TD></TD><TD PORT="data_type">data</TD></TR>
					<TR><TD PORT="counter_out_pos">16</TD><TD PORT="counter_out_size">16</TD><TD></TD><TD PORT="counter_out_type">counter_out</TD></TR>
				</TABLE>>];
			}
		}
	}
	ines__seq:header_type -> header__seq [style=bold];
	header__seq:len_prg_rom_type -> ines__seq:prg_rom_size [color="#404040"];
	header__seq:len_chr_rom_type -> ines__seq:chr_rom_size [color="#404040"];
	ines__seq:playchoice10_type -> playchoice10__seq [style=bold];
	header__seq:f6_type -> f6__seq [style=bold];
	header__seq:f7_type -> f7__seq [style=bold];
	header__seq:f9_type -> f9__seq [style=bold];
	header__seq:f10_type -> f10__seq [style=bold];
	f6__seq:lower_mapper_type -> header__inst__mapper [color="#404040"];
	f7__seq:upper_mapper_type -> header__inst__mapper [color="#404040"];
	playchoice10__seq:prom_type -> prom__seq [style=bold];
}